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Artificiell intelligens och intelligenta system

Automatiserade mjukvaruspråkutveckling och mjukvaruteknik

Digitalisering

Formell modellering och analys av inbyggda system

Förnybar energi

Industriell programvaruteknik

Komplexa inbyggda system i realtid

Lärande och optimering

Medicinsk teknik

Modellbaserad konstruktion av inbäddade system

Programmeringsspråk

Certifierbara bevis och justifieringsteknik

Cyber-fysisk systemanalys

Datakommunikation

Heterogena system

Programvarutestlaboratorium

Resurseffektivisering

Säkerhetskritisk teknik

Teknisk matematik

HISCORE - Hierarchical Scheduling of Complex Real-Time Embedded Systems

The project will develop abstract representations of hierarchically scheduled semi-independent subsystems on uni-processor, distributed and multiprocessor architectures.

Avslutat

Start

2008-01-01

Avslut

2011-12-31

Forskningsinriktning

Projektansvarig vid MDH

No partial template found

Description of the project

Most of today's complex embedded systems must satisfy extra-functional requirements for proper operation, i.e., in addition to correct function, there are important requirements on, e.g., timeliness, reliability and energy consumption. It is desirable to be able to construct a system from multiple subsystems, since subsystems are often provided by different suppliers, and since partitioning provides a basis for complexity reduction. However, subsystems often share logical resources, e.g., memory areas, hence making it hard to independently develop and validate subsystems. Moreover, integration of these semi-independent subsystems may be difficult due to intricate dependencies.

For independent subsystems, hierarchical scheduling has shown to be useful in preserving the extra-functional property of timeliness. In this project we will develop and generalize hierarchical scheduling frameworks allowing for semi-independent subsystems, thus making hierarchical scheduling frameworks suitable for deployment in complex (real) architectures, such as those encountered in the automation, telecom, and vehicular domains.

More specifically we will develop abstract representations of hierarchically scheduled semi-independent subsystems on uni-processor, distributed and multiprocessor architectures. For each of these, we will develop appropriate synchronization protocols and associated real-time analysis.

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