The public defense of Marcus Jägemar’s doctoral thesis in Computer Science and Engineering

Datum: 2018-10-18
Tid: 13.15
Plats: Room Beta, MDH Västerås

The public defense of Marcus Jägemar's doctoral thesis in Computer Science and Engineering will take place at Mälardalen University, room Beta, MDH Västerås at 13.15 on October 18, 2018.

Title: “Utilizing Hardware Monitoring to Improve the Quality of Service and Performance of Industrial Systems”.

Serial number: 270

The faculty examiner is Professor Håkan Grahn, Blekinge Institute of Technology, and the examining committee consists of Associate Professor Vladimir Vlassov, KTH Royal Institute of Technology; Senior University Lecturer Vesa Hirvisalo, Aalto University; Docent Martina Maggio, Lund University.

Reserve: Professor Mats Björkman, Mälardalen University


The drastically increased use of information, and communications technology has resulted in a growing demand for network capacity. The demand for increased capacity coincides with cost-reduction due to an increasingly competitive market. We have addressed the capacity problem in two ways. The first is to reduce the development time by replicating production system hardware load on test systems during the functional test. The second is to improve the actual communication performance, and the third implements allocation and scheduling techniques to allow higher levels of software consolidation on shared hardware. We reduce the development time by moving part of the performance testing from the last phases of the development process to the much earlier design phase. We start by measuring the hardware load on production systems operational at customer sites giving us data on the systems' hardware resource usage and performance. We use the measured data to replicate the hardware load while on a test node while simultaneously running the functional test suite. The resulting test environment has a similar hardware resource usage as the production environment and provides a better environment for functional tests. In this way, we can reduce the system development time. We discovered that the communication subsystem was saturated and that the CPU load was not always fully utilized. To improve the performance, we devised a method that dynamically trade computational capacity for a message round-trip time reduction when there are CPU cycles to spare. We have implemented an automatic feedback controlled mechanism for transparent message compression resulting in improved messaging performance between interconnected network nodes. The performance of several system functions dropped when consolidating software on shared hardware. Our resource monitor showed that we experienced an overload situation for specific resources, such as caches. To solve the issue, we developed a mechanism that can allocate automatically processes to minimize their shared resource congestion. We further developed our techniques to ensure the quality of service for processes that co-executing on the same hardware.  We have conducted several case studies in an industrial environment and verified all contributions on a large telecommunication system manufactured by Ericsson. System engineers frequently use the monitoring and modeling functionality for debugging purposes in production environments. We have deployed all techniques in a complicated industrial legacy system with minimal impact.